New Challenges for Backup Power Systems in the AIDC Era

The explosive demand for AI computing power has led to a surge in per-rack power density, and traditional backup power systems face a triple challenge of high reliability, rapid response, and high power density.

In his speech, Zhang Xinfeng pointed out that in the AIDC era, per-rack power is generally above 100kW and is evolving toward 1MW+.

AI training causes load fluctuations to be 10 times higher than traditional non-AI workloads, and millisecond-level power outages can result in millions of dollars in losses. This is also driving the transformation of traditional backup power systems toward a role of transient power support.

Traditional lead-acid batteries remain the mainstream choice for current backup power systems, but their shortcomings—inadequate rate performance, massive space occupation, short lifespan, and high maintenance costs—are becoming increasingly prominent in AIDC scenarios characterized by high power density and high-frequency load fluctuations.

AIOn X-Rate: Built for AIDC High-Rate Backup Power

Addressing these pain points, Narada has built an AIDC backup power product ecosystem matrix to provide comprehensive power protection for AI computing centers.

Narada's AIDC lithium battery backup product portfolio covers the full range from 300kW to 1200kW. Among them, the core new product AIOn X-Rate is specifically designed for AIDC scenarios. With three core advantages—"ultra-high power, ultimate safety, and long-cycle durability"—this product redefines the energy foundation for AIDC in the computing era.

The system adopts lithium iron phosphate (LFP) cells specifically developed for high-power scenarios, supporting 10C ultra-high-rate discharge with zero-latency response. Its 10C discharge capability is comparable to 1C, demonstrating excellent rate performance.

Thanks to innovations in the material system, the system's per-cabinet power exceeds 600kW, and the cell's power density exceeds 1900W/kg, enabling it to release massive energy in an extremely short time. Additionally, the system's pulse cycle life is particularly impressive: the number of 500ms pulse discharges exceeds 200,000, perfectly adapting to AIDC's ultra-high-frequency frequency regulation needs.

Zhang Xinfeng introduced that the system's BMS provides solid protection for AIDC scenarios with two key highlights: high-precision sensing and system-level balancing.

In terms of high-precision sensing, the product follows the AEC-Q100 automotive-grade standard, adopting AFE chips with ASIL-D functional safety level and 24-bit dedicated BJB chips. The typical error in battery voltage collection is only ±1.5mV, with ≤±3mV across the full temperature range. The typical error in system current collection is <±0.3%, with small-current accuracy <±10mA, ensuring precise monitoring even under light load or standby conditions.

In terms of system-level balancing, the BMS innovatively adopts a bus-type charging architecture, achieving active balancing of the entire cluster of cells through DC/DC and MOS matrix switching.

Compared to passive balancing, efficiency is improved by 20 times, quickly aligning the status of each cell, effectively avoiding the module-level "short-board effect," eliminating "infighting" between cells, significantly extending the overall lifespan of the battery pack, increasing usable capacity, and reducing operational and maintenance costs.